1. Field of the Invention
The present invention relates generally to photolithographically patterned spring contacts, and more particularly to a plurality of such photolithographically patterned spring contacts having nanowire tips, released at one end from a substrate such that the tips are oriented out of the plane of the substrate.
2. Description of the Prior Art
Photolithographically patterned spring devices (referred to herein as “microsprings”) have been developed, for example, to produce low cost probe cards, and to provide electrical connections between integrated circuits. Such microsprings are disclosed and described, for example, in U.S. Pat. No. 5,914,218, which is incorporated by reference herein. A microspring is generally a micrometer-scale elongated metal structure having a free (cantilevered) portion which bends upward from an anchor portion which is affixed directly or indirectly to a substrate. The microspring is formed from a stress-engineered metal film (i.e., a metal film fabricated to have a stress differential such that its lower portions have a higher internal compressive stress than its upper portions) that is at least partially formed on a release material layer. The microspring is attached to the substrate (or intermediate layer) at a proximal, anchor portion thereof. The microspring further includes a distal, tip portion which bends away from the substrate when the release material located under the tip portion is removed (e.g., by etching).
The stress differential is produced in the spring material by one of several techniques. According to one technique, different materials are deposited in layers, each having a desired stress characteristic, for example a tensile layer formed over a compressive layer. According to another technique a single layer is provide with an intrinsic stress differential by altering the fabrication parameters as the layer is deposited. The spring material is typically a metal or metal alloy (e.g., Mo, MoCr, W, Ni, NiZr, Cu), and is typically chosen for its ability to retain large amounts of internal stress. Microsprings are typically produced using known photolithography techniques to permit integration of the microsprings with other devices and interconnections formed on a common substrate. Indeed, such devices may be constructed on a substrate upon which electronic circuitry and/or elements have previously been formed.
FIGS. 1A-1C illustrate the basic, prior art process of fabricating stress-engineered cantilevered microsprings 10. With reference first to FIG. 1A, stress-engineered cantilevers 10 are fabricated by depositing and patterning one or more films to form a stress-engineered cantilever 12 with a designed strain-gradient over a sacrificial layer 14, which itself is formed over a dielectric layer 16 pattered over a substrate 18. Deposition conditions and other parameters may be controlled, as known in the art, to tailor the stresses along the elevation (e.g., in various layers) of the stress-engineered cantilever 12. Stress-engineered cantilever 12 can be of a single film type, such as MoCr alloy, where different layers of the film have different stresses. As stress-engineered cantilever 12 is initially formed in a plane which is parallel to the primary plane of substrate 18, we refer to the fabrication of stress-engineered cantilever 12 as being “in-plane.” Stress-engineered cantilever 12 may also be composed of different film types with different stresses. Stress-engineered cantilever 12 is patterned and then released, as illustrated in FIG. 1B, by etching away a portion of sacrificial layer 14 underneath the stress-engineered cantilever 12. To lift the spring up and away from the substrate the stress gradient should be such that more compressive layers are disposed closer to the substrate, and the more tensile layers disposed thereover.
After stress-engineered cantilever 12 is released, additional layers 20 can optionally be plated on the surface of stress-engineered cantilever 12, as shown in FIG. 1C, to improve strength and conductivity. In additional, multiple stress-engineered cantilevers 12 may be formed in an overlying relationship such that, for example, a lower stress-engineered cantilever 12 provides structural support for an upper stress-engineered cantilever 12, as disclosed in the aforementioned U.S. patent application Ser. No. 11/292,474.
Stress-engineered cantilevers formed by this process are unique because the process facilitates the formation of arrays 22 of devices with contact points out of the plane in which the devices are manufactured, as shown in FIG. 2. Linear and 2-d arrays can thereby be produced. Typically, array 22 is formed, with a tip-to-tip spacing selected according to the application of the array. For example, for probe testing, the tip-to-tip spacing would match the spacing of contact pads, leads or the like on the device under test.
Another unique aspect of the process used to fabricate array 22 is that the stress-engineered cantilevers 12 are formed from thin films (e.g., 5 um or less) in-plane, that is, in the same plane as the original substrate. This is in contrast to processes used to produce, for example, conventional silicon atomic force microscopy (AFM) tips, where a tip is fabricated from a relatively thick film (10-20 microns), requiring expensive and complex 3D etching techniques, and where the etch sidewall profile strongly effects the shape tip of the tip of the AFM tip.
Such microsprings may be used in probe cards, for electrically bonding integrated circuits, circuit boards, and electrode arrays, and for producing other devices such as inductors, variable capacitors, scanning probes, and actuated mirrors. For example, when utilized in a probe card application, the tip of the free portion of a microspring is brought into contact with a contact pad formed on an integrated circuit, and signals are passed between the integrated circuit and test equipment via the probe card (i.e., using the microspring as an electrical contact).
Microsprings typically terminate at a tip, whose shape may be controlled photolithographically as the microspring is pattered in-plane. In certain applications, the microspring has a tip profile (e.g., an apical point) capable of physically penetrating an oxide layer that may form on the surface to which electrical contact is to be made. In order to provide a reliable contact with a surface to be contacted, the microspring must provide a relatively high contact force (the force which the spring applies in resisting a force oppositely applied from the surface to be contacted). This is particularly true in applications in which the apical point must penetrate an oxide layer. For example, some probing and packaging applications require a contact force on the order of 50-100 mg between the tip and the structure being contacted.
In certain applications, such as probe-based data storage, lithography, imaging, metrology, and printing and biology addition, there is a desire or requirement for extremely sharp microspring tips (<100 nm). In these applications lower forces are often used (<1 micronewton). Current lithographic process have not proven sufficient to provide the desired sharpness. There have been various attempts to provide very fine tip structures in the prior art.
One approach to providing a very fine tip structure for a microspring has been to manually bond a pre-formed nanowire onto the tip of a released microspring. There are several known methods of producing nanowires.
Silicon nanowires—Chemical vapor deposition (CVD) has been widely used to synthesize and grow large quantities of high quality silicon nanowires. The growth involves a vapor-liquid-solid process: vapor phase precursor (e.g., SiH4) decomposes on the surface of catalysts (e.g., Au) when heated up, and forms a liquid alloy. The continuous feeding of Si into the alloy will supersaturate the alloy and Si nanowires will begin to grow elongate.
Silicon nanowires grow preferentially along the <111> direction through epitaxial growth. If the vertical {111} planes are exposed, Si nanowires 24 can grow horizontally, and bridge two opposite {111} planes, as illustrated in FIG. 3 (from R. He, D. Gao, R. Fan, A. I. Hochbaum, C. Carraro, R. Maboudian, and P. Yang, “Si Nanowire Bridges in Microtrenches: Integration of Growth into Device Fabrication,” Advanced Materials, vol. 17, pp. 2098-2102, 2005). The density, diameter, and length of the bridging Si nanowire 24 can be well-tuned by controlling the density of catalyst, size of the catalyst, and the distance between the two opposite planes. Growth temperatures are in the range of 400° C. and diameters are typically 10-20 nanometers (nm).
Germanium nanowires—The chemical vapor deposition (CVD) growth strategy for germanium nanowires is very similar to silicon nanowires, which also follows a vapor-liquid-solid process, except that a gas phase precursor will be a germanium-containing gas, such as GeH4 instead of SiH4, and in general the growth temperature will be lower than Si nanowire growth (approximately 300° C.). Typical diameters are 10-40 nanometers (nm).
Carbon nanotubes—Growth of nanometer-scale structures in carbon produce a unique, hollow or tube-like structure. Accordingly, such structures formed of Carbon are commonly referred to as nanotubes. For carbon nanotube growth, CVD growth is also one of the best synthesis methods. The gas phase precursors are carbon containing gases, such as CH4, C2H4, C2H5OH vapor etc; metal catalysts are usually Fe, Co, Ni etc instead of Au for Si and Ge nanowires. Typical growth temperatures are approximately 650° C. and of diameter less than 3 nm.
Nanotubes spread out on a substrate can be placed onto a silicone AFM tip by using micromanipulators. Nanotubes manually attached to probe tips are available as “CNTek carbon nanotube-tipped AFM probes” from Nanoscience Instruments, Inc. (www.nanoscience.com). For many applications, such probes are prohibitively expensive. Furthermore, production of arrays are not practical with this method because the assembly process is insufficiently repeatable in terms of nanotube position and length. In general, given the very small size of these structures, accurately positioning and bonding the nanowire onto the tip of a probe has proven challenging.
Another effort at providing integrated nanowires and microsprings involves growth of nanowires on conventional cantilever tips. Growth of carbon nanotubes on a probe structure has been attempted with using chemical vapor deposition where the catalyst is patterned on the side of an existing silicon etched probe tip. It is asserted that this process produces nanotubes protruding on 90% of an array of probe tips on a wafer, extending 1-10 micrometers beyond the silicon tip. However, this non-uniformity has prohibited use of these structures, as grown, for probing applications. To shorten the nanotubes to sub-1 micrometer extension, an oxidation discharge process has been employed, which necessitates handling each single cantilever in a tapping mode electrical AFM mode setup. Similar to the gluing, the process is essentially serial, and prohibitive in terms of cost, time, and ultimately uniformity.
Field enhanced growth has also been used for nanometer-scale tip production, such as growing tungsten nanowires seeded from metal pads in a tungsten vapor ambient. The process is serial (one tip at a time), cumbersome, and requires precise alignment of a sharp tip counter electrode close to the silicon tip. Nonetheless, nanowires on the ends of silicon tips have been fabricated and used in probing experiments.
Focused ion beam etching and electron beam induced deposition have also been used to produce devices having micromachined nanometer-scale tips, referred to herein as nanotips. Each of these techniques attempts to place a nanowire or nanotube perpendicularly at the micromachined tip of an in-plane probe structure. However, such processes suffer from low uniformity, control, yields, and throughputs due to the difficulty of vertically aligning the nanowires (both in length and in angle relative to the plane of the probe).
What is needed is a way to make nanowires or equivalently, nanotubes, on cantilevers in a parallel process such that two dimensional arrays of uniform nanotips can be readily formed.